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Home/Blog/AI Chip Supply Ranked 2026: Nvidia, AMD, Broadcom, TSMC, and Who's Actually Unconstrained
AI & TechnologyJuly 28, 2026ยท9 min read readยท

AI Chip Supply Ranked 2026: Nvidia, AMD, Broadcom, TSMC, and Who's Actually Unconstrained

TSMC's CoWoS packaging is booked 52-78 weeks out and HBM memory is nearly sold out through 2026 โ€” here's how the 6 companies building AI's silicon actually stack up on real supply position.

TC
Trace Cohen
Co-Founder & GP at Six Point Ventures ยท 3x founder (BrandYourself, Launch.it, SPOT) ยท 65+ investments ยท Based in Boca Raton, FL
@Trace_Cohenยทt@nyvp.comยทSouth Florida Advisory
65+Investments3xFounder$200M+Funds Tracked
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Quick Answer

52-78 weeks is the current CoWoS packaging lead time gating nearly every AI chip in 2026, with Nvidia controlling roughly 60% of that capacity versus AMD's 11%. HBM memory is almost fully allocated for 2026 per SK Hynix, meaning even well-funded buyers face year-long waits for Blackwell-class systems.

TSMC's CoWoS packaging โ€” the bottleneck every AI chip has to pass through โ€” is booked solid with 52-78 week lead times in 2026, and Nvidia controls roughly 60% of that capacity versus AMD's 11%.

That's the short answer. The longer answer is that "AI chip shortage" stopped being one shortage a while ago โ€” it's now a stack of three separate bottlenecks (foundry wafers, CoWoS packaging, and HBM memory), and each vendor's real supply position depends on how much of each layer they've locked up. Below, I've ranked the 6 companies that actually determine how much AI compute reaches the market in 2026, based on current allocation data, lead times, and backlog figures.

52-78 wks
fully booked
TSMC CoWoS packaging lead time
~60%
vs AMD's ~11%
Nvidia's CoWoS allocation share
$73B
FY2025 AI ASIC rev $20B+
Broadcom AI backlog
+44.6%
vs +16.1% merchant GPU
Custom ASIC shipment growth, 2026

Is the AI chip shortage over in 2026, or just changed shape?

The AI chip shortage is not over in 2026 for the most advanced parts โ€” it's shifted from raw GPU scarcity to a packaging and memory bottleneck. TSMC's CoWoS lines are fully booked 52-78 weeks out, SK Hynix's 2026 HBM output is already almost entirely allocated, and Blackwell-class B200/GB200 systems remain hyperscaler-locked and effectively unavailable outside pre-existing forward orders from Microsoft, Google, Meta, and Amazon.

It helps to separate the three layers that people lump together as "the chip shortage." First, wafer fabrication โ€” TSMC's leading-edge nodes, where 2nm capacity is already booked through 2028. Second, advanced packaging โ€” CoWoS, the process that bonds HBM stacks onto the GPU substrate, which is the layer with the tightest near-term constraint right now. Third, HBM memory itself, made by SK Hynix, Samsung, and Micron, which has its own separate wafer-start ceiling. A chip can clear the first bottleneck and still sit in queue for months waiting on the second or third โ€” which is exactly what's happening to Blackwell orders placed today.

AI chip supply ranked: the 6 companies that decide who gets compute in 2026

Ranked by real allocation share, backlog size, and how exposed each company is to the CoWoS and HBM constraints choking the entire category this year.

1
TSMC (foundry + CoWoS packaging)
The chokepoint underneath every other name on this list. TSMC's CoWoS-S and CoWoS-L packaging lines are both fully booked with lead times of roughly 52-78 weeks, and its own CEO has said packaging capacity remains about three times short of HBM-driven demand. TSMC's 2nm orders are already booked out to 2028.
Best for: Understanding why every AI chipmaker's roadmap ultimately depends on one company's packaging lines
2
Nvidia (H200 / B200 / GB200 Blackwell)
Controls an estimated 60% of TSMC's CoWoS allocation for 2026, the largest single share of any customer. Despite that advantage, H200 and B200 lead times still run 36-52 weeks, and Blackwell systems are effectively hyperscaler-allocated and unavailable at retail after Microsoft, Google, Meta, and Amazon locked up forward orders in 2025.
Best for: Buyers who can commit to multi-quarter lead times for the highest-performance training clusters
3
Broadcom (custom AI ASICs)
Sitting on a $73 billion AI backlog with FY2025 AI ASIC revenue already above $20 billion, and targeted by Counterpoint Research to hold roughly 60% share of the custom AI chip design market by 2027. Custom ASIC shipments are growing an estimated 44.6% year-over-year in 2026 โ€” nearly triple merchant GPU growth โ€” because ASIC programs let hyperscalers partially route around Nvidia's allocation queue.
Best for: Hyperscalers designing workload-specific silicon (Google, Meta, OpenAI, Anthropic) who want a second supply path
4
Google (TPU, via Broadcom)
Anthropic alone has committed to nearly 1 million Google TPU units scheduled to arrive by late 2026, and Google's TPU program wins on cluster coordination scale and software stack maturity even where it trails Nvidia on raw chip availability. Still gated by the same Broadcom-fabbed CoWoS packaging constraint as everyone else.
Best for: Large model labs wanting an alternative to Nvidia allocation queues with proven software support
5
Amazon (Trainium2, via Broadcom/Marvell)
Has deployed more than 500,000 Trainium2 chips in production, the largest commercial hyperscaler ASIC fleet by unit count, giving AWS real leverage to offer capacity independent of Nvidia's queue โ€” though Trainium still trails Nvidia and Google on software maturity for training the largest frontier models.
Best for: AWS-native teams that can tolerate a less mature software stack in exchange for available capacity
6
AMD (MI355X / Instinct)
Holds only about 11% CoWoS allocation versus Nvidia's 60% โ€” a structural production ceiling, not a demand problem. AMD's MI300 series has real hyperscaler traction and roughly 6-8% AI accelerator market share by revenue, but its ability to scale output is capped by the same packaging bottleneck everyone shares, with a smaller slice of it.
Best for: Buyers prioritizing price-performance on inference workloads who can work within tighter allocation

AI chip vendors compared: allocation, lead times, and backlog

VendorCoWoS / capacity positionCurrent lead time2026 market sharePrimary product
TSMCSole CoWoS supplier, fully booked52-78 weeks (packaging)~90% of advanced AI chip fabricationFoundry + CoWoS-S/CoWoS-L
Nvidia~60% of CoWoS allocation36-52 weeks (H200/B200)70-81% AI accelerator revenueH200, B200, GB200 Blackwell
Broadcom~20% via ASIC customer allocationNot disclosed separately~60% custom ASIC design share (2027E)Custom AI ASICs (TPU, Trainium partner)
GoogleVia Broadcom fab partnership~1M TPU units to Anthropic by late 2026Not broken out separatelyTPU (Ironwood generation)
AmazonVia Broadcom/Marvell fab partnership500K+ Trainium2 deployedNot broken out separatelyTrainium2
AMD~11% of CoWoS allocationNot disclosed separately6-8% AI accelerator revenueMI300/MI355X Instinct

Figures are Q2-Q3 2026 estimates blended from Silicon Analysts foundry allocation reporting, Counterpoint Research, Tom's Hardware custom ASIC coverage, CNBC hyperscaler chip reporting, and company earnings disclosures. Several vendors do not separately break out AI-specific chip revenue from total segment revenue.

Why HBM memory is still the hidden AI chip shortage in 2026

Every AI accelerator on this list needs High Bandwidth Memory bonded onto it via CoWoS, and HBM itself is separately supply-constrained. SK Hynix executives have confirmed their 2026 HBM output is almost entirely allocated already, global HBM wafer starts sit near 350,000 against demand that significantly exceeds that figure, and TSMC's own CEO has said packaging capacity remains roughly three times short of HBM-driven demand. Samsung and Micron are both ramping HBM capacity, but neither is expected to meaningfully ease the shortage before late 2026 at the earliest.

TSMC's CoWoS expansion is targeting roughly 25% higher output by late 2026, but AI accelerator demand is growing faster than that projection, which is why lead times have kept climbing through the year rather than stabilizing. Meaningful new packaging capacity is expected online in the second half of 2026 โ€” the real gating factor for how much Blackwell and MI355X volume actually ships โ€” but most forecasters now expect the combined HBM-and-CoWoS constraint to persist into at least the first half of 2027.

What the AI chip supply ranking means for buyers and investors

For anyone actually trying to buy compute in 2026, the practical lesson from this ranking is that allocation share matters more than announced specs. AMD's MI355X is competitive on paper, but an 11% CoWoS allocation versus Nvidia's 60% means AMD simply cannot ship enough units to seriously dent Nvidia's ~70-81% AI accelerator revenue share this year, regardless of price-performance โ€” the constraint is structural, not commercial. That's the same dynamic reshaping the layer right above the chip itself, where AI networking vendors are also racing to reduce dependence on a single company's bundled stack.

As an investor, the more interesting story here is Broadcom's custom ASIC business, which is growing shipments 44.6% year-over-year โ€” nearly triple merchant GPU growth โ€” precisely because hyperscalers like Google, Amazon, and Meta are willing to spend years and billions of dollars building their own silicon just to get out from under CoWoS allocation queues they don't control. That's a rational response tracked closely alongside overall AI infrastructure spend on our Big Tech Earnings dashboard, and it's worth watching whether custom ASIC volume actually displaces merchant GPU share once the packaging bottleneck eventually clears.

I've made 65+ investments and the pattern here is a familiar one: when a single company controls the scarcest input in a fast-growing category โ€” in this case, TSMC's CoWoS lines, not any one chip design โ€” every other vendor's roadmap becomes a negotiation over allocation, not a pure product competition. Nvidia's 60% CoWoS share is arguably a more durable moat right now than any architectural advantage in Blackwell itself, because it can't be out-engineered โ€” only out-negotiated with TSMC, or routed around entirely via custom ASICs the way Google, Amazon, and Broadcom are doing.

For founders building on top of any of these chips, the practical implication is procurement risk that didn't exist two years ago: a startup locking in compute today for a model to be trained in early 2027 needs to plan around 52-78-week packaging lead times as a real constraint, not a footnote, the same way hardware startups have always had to plan around component lead times. Cloud GPU marketplaces and reserved-capacity deals with hyperscalers exist precisely to smooth over this allocation math for smaller buyers who can't negotiate directly with TSMC or place billion-dollar forward orders the way Microsoft, Google, Meta, and Amazon can.

The Bottom Line:

The AI chip shortage in 2026 isn't about GPU designs anymore โ€” it's about who controls TSMC's 52-78-week CoWoS packaging queue and the nearly sold-out HBM supply underneath it. Nvidia's ~60% allocation share explains its dominance better than any spec sheet, Broadcom's $73 billion ASIC backlog shows hyperscalers are willing to pay years of R&D to route around the bottleneck, and AMD's ~11% share is the real reason it can't yet close the gap on price-performance alone.

Track AI infrastructure spending on the Big Tech Earnings Dashboard and see how AI-native companies are valued on the AI Valuations Dashboard at Value Add VC. Originally published in the Trace Cohen newsletter.

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Frequently Asked Questions

Is the AI chip shortage over in 2026?

No, not for the most advanced parts. TSMC's CoWoS advanced packaging โ€” required for every modern AI accelerator โ€” is fully booked with lead times of 52-78 weeks, and SK Hynix's 2026 HBM memory output is already almost entirely allocated. Older Hopper-generation GPUs are easier to get; Blackwell B200/GB200 systems remain hyperscaler-allocated and effectively unavailable at retail.

Why is HBM memory still in shortage in 2026?

TSMC's own CEO has said packaging capacity remains roughly three times short of HBM demand, and SK Hynix executives have confirmed their 2026 HBM output is almost fully allocated already. Global HBM wafer starts sit near 350,000 versus demand that significantly exceeds it, and Samsung and Micron's capacity additions aren't expected to meaningfully ease the shortage before late 2026.

How much of TSMC's CoWoS capacity does Nvidia control versus AMD?

Nvidia has booked roughly 60% of TSMC's CoWoS advanced packaging capacity for 2026, compared to AMD's MI355X allocation of around 11%. Since CoWoS is a structural bottleneck that every AI chipmaker needs and TSMC is the sole supplier, that allocation gap functions as a hard ceiling on how fast AMD can scale output regardless of demand.

What is Broadcom's market share in custom AI chips (ASICs) in 2026?

Broadcom carries a $73 billion AI backlog and is targeted to hold roughly 60% share of the custom AI ASIC design market by 2027, per Counterpoint Research, with FY2025 AI ASIC revenue already above $20 billion. Custom ASIC shipments are growing an estimated 44.6% year-over-year in 2026, nearly triple the growth rate of merchant GPUs like Nvidia's.

When will the CoWoS and HBM packaging bottleneck actually ease?

Meaningful new CoWoS packaging capacity is expected online in the second half of 2026, which is the real gating factor for AI GPU production volume, but supply constraints from both HBM and CoWoS are expected to persist into at least the first half of 2027. TSMC's own CoWoS expansion targets roughly 25% higher output by late 2026 โ€” a pace still slower than AI accelerator demand growth.

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Trace Cohen is a serial founder, investor and data geek. Please feel free to reach out t@nyvp.com

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