Analysis
Agentrys, a San Jose-based developer of AI agents for semiconductor design, has raised $24.5 million in total funding, Semiconductor Digest reported.
The total includes an oversubscribed $19.1 million seed round led by Etna Labs, following a $5.4 million pre-seed round led by chipmaker MediaTek.
Founder Mark Ren brings nearly three decades of electronic design automation and AI research experience spanning Nvidia Research and IBM Research, where he led ChipNeMo, widely cited as the first large language model built specifically for chip design workflows. That pedigree matters more than usual in this category: EDA is a notoriously specialized field dominated by entrenched incumbents, and Agentrys is pitching a category shift rather than a point-tool improvement.
“The total includes an oversubscribed $19.1 million seed round led by Etna Labs, following a $5.4 million pre-seed round led by chipmaker MediaTek.”
What "Agentic Design Automation" actually means
Traditional EDA tools -- the software used to design, verify and lay out semiconductors -- are built around discrete, single-task functions: simulation, verification, physical layout, each requiring specialist engineers to operate and stitch together. Agentrys is building what it calls Agentic Design Automation, positioning its agents to automate, learn from and continuously improve entire engineering workflows rather than individual tasks, with initial customer engagements focused on verification and physical design -- two of the most labor-intensive, bottleneck-prone stages of chip development.
Why this lands now
Chip design cycle times have become a genuine constraint on how fast the AI buildout can move -- Nvidia, AMD, Broadcom and every hyperscaler running custom silicon are all bottlenecked partly by design and verification throughput, not just fab capacity. An AI agent layer that meaningfully compresses verification time addresses a cost center that scales directly with the industry's own AI ambitions, which is likely why MediaTek backed the pre-seed round directly rather than leaving the bet to financial investors alone.
The competitive landscape
- Agentrys -- $24.5M total, San Jose: Agentic Design Automation for chip verification and physical design. Competitors: Synopsys, Cadence, Siemens EDA, the entrenched incumbents Agentrys is positioning against, plus emerging AI-native rivals building similar agent layers on top of existing EDA suites. Source
Synopsys and Cadence together control the large majority of the EDA market and have both been layering AI features onto existing tools rather than rebuilding around agents -- Agentrys's bet is that incumbents' installed-base inertia leaves room for an agent-native challenger, the same wedge argument every AI-native challenger to an entrenched enterprise category makes.
The counterweight
$24.5 million is a modest war chest against Synopsys and Cadence's combined R&D budgets, which run into the billions annually, and both incumbents can and will ship their own agentic verification features rather than cede the category. Chip design customers are also famously conservative about adopting new tooling given how expensive a design error becomes once silicon is taped out -- sales cycles here run in quarters, not weeks, and Agentrys's seed-stage capital needs to survive that cycle before it can prove the thesis at scale.
